Analog-to-digital conversion refers to the process of converting an analog signal into a digital signal. The conversion of analog signals to digital signals is often used in order to interface real world systems, many of which monitor continuously varying analog signals, with digital systems that read, store, interpret, manipulate and otherwise process the values corresponding to the analog signals. Similarly, digital-to-analog conversion refers to the process of converting digital signals into a continuous range of analog signals. Real world applications which use analog-to-digital converters include, for example, digital audio systems such as compact disc players, digital audio tape players, mini-disc players and various other high performance audio applications, which include conversion of audio frequency bands at a high resolution. By way of further example, a wide variety of digital signal processing applications also utilize analog-to-digital converters.
The efficiency and performance of analog-to-digital converters ("A/D converter(s)") and digital-to-analog converters ("D/A converter(s)") may be effected by a number of factors including resolution, sampling rate, speed and linearity. "Resolution" of an A/D converter refers to the smallest change in voltage that can be detected by the converter and that can produce a change in the digital code. With respect to D/A converters, resolution refers to the smallest change in the output analog signal. The resolution of a converter generally determines the total number of digital codes, or quantization levels, that may be recognized or produced by the converter or the circuit implementing the converter. The resolution of a D/A converter or an A/D converter may be specified in terms of the number of bits in the digital signal or in terms of the least significant bit of the system.
The "speed" of a D/A converter or an A/D converter may be determined by the time it takes to perform the conversion process. The speed is specified as the "settling time" when referring to D/A converters, and is specified as the "conversion time" when referring to A/D converters. The settling time for D/A converters may vary depending upon supply voltage and transition in the digital code.
"Sampling rate" of a converter refers to the number of times per second that the analog signal can be sampled and converted into a digital code by an A/D converter. A/D converters generally have a minimum sampling rate of at least two times the highest frequency of the analog signal being sampled. "Oversampling" refers to a converter which uses a sampling rate of N times a rate that is equivalent to twice the highest frequency in the analog signal, where N typically may range from between 2 to 64.
Finally, "linearity" represents the measurement accuracy of the converter. A number of different types of linearity exist. For example, "integral" linearity, which may also be referred to as "relative accuracy," is a measure of linearity over the entire conversion range. A second type of linearity is "differential" linearity which represents the linearity between code transitions and is a measure of the monotonicity of the converter. A converter is sometimes said to be monotonic if increasing input values result in increasing output values.
As previously mentioned, very high resolution digital audio or video systems often use specialized A/D converters or techniques for converting analog signals to digital signals as, for example, in compact disc applications. Although only a maximum base band frequency of approximately 20 kHz is generally used for systems like compact disc systems, a high resolution in the range of 16 to 18 bits is often used. Achievement of such a high resolution is generally difficult using very large scale integrated circuit ("VLSI") technologies absent the implementation of external trimming. As a result, sigma-delta A/D converters often are used when a higher resolution is required. Sigma-delta A/D converters provide for oversampling A/D conversion through the sampling of signals at very high frequencies. In other words, the combination of oversampling and noise shaping technologies may be implemented using a sigma-delta A/D converter in order to achieve a high resolution without external trimming.
Referring to FIG. 1, a block diagram is shown illustrating a conventional multi-bit sigma-delta A/D converter. The conventional multi-bit sigma-delta A/D converter illustrated in FIG. 1 includes 4 bit counter 10, 4 bit D/A converter 12, adder 14, sampling circuit 16, 4 bit A/D converter 18, and select circuit 20. In addition, the multi-bit sigma-delta A/D converter shown in FIG. 1 also includes decimation filter 22, an 18 bit full adder 24 and memory 26 which may be in the form of random access memory. The conversion process implemented by the multi-bit sigma-delta A/D converter illustrated in FIG. 1 begins with counter 10 counting the signals of the input clock CLK. The counter signals, and digital representation, are converted by the 4 bit D/A converter 12 to an analog signal which forms one of the inputs to adder 14. The other input to adder 14 is a reference signal obtained from the select circuit 20.
Sampling circuit 16 samples the output from adder 14 and generates a sampled analog signal. The sampled analog signal is converted by the 4 bit A/D converter 18 to a 4 bit digital signal. Thereafter, the multi-bit sigma-delta A/D converter of FIG. 1 identifies the most significant bit ("MSB") and provides the most significant bit of the digital signal as input to select circuit 20 and decimation filter 22. The most significant bit of the digital signal is used by select circuit 20 to select a positive reference signal (i.e., Vref+) or a negative reference signal (i.e., Vref-). The output of select circuit 20 then forms one of the inputs to adder 14.
The MSB of the digital signal generated by A/D converter 18 is filtered by decimation filter 22 to generate an 18 bit digital signal which is then combined with the 4 bit output from counter 10 using an 18 bit full adder 24 to generate a 10 bit digital signal. This is accomplished by full adder 24 through the subtraction of the 4 bit digital signal generated by counter 10 from the 18 bit digital signal generated by decimation filter 22. The resulting 10 bit digital signal represents the error code or data. This error code or data is stored in memory 26 at the address corresponding to the 4 bit digital signal generated by counter 10 upon a write control signal WR.
Sigma-delta A/D converters generally include a 1 bit analog-to-digital converter and a 1 bit digital-to-analog converter. The inclusion of the 1 bit A/D converter and a 1 bit D/A converter may assist in addressing many of the problems associated with linearity. However, a 1 bit sigma-delta A/D converter generally must increase its oversampling ratio from 64 times up to as much as 256 times and use a second order or higher cascade. As a result of the increase of the oversampling ratio and/or use of a higher order cascade, the clock frequency of the decimation filter may be raised from as little as 256 Fs to 512 Fs and an increase in current consumption may also be required. Still further, stabilization of a modulator in the sigma-delta A/D converter may occur. As a result, special requirements may be necessary in calculating any filter co-efficient for the modulator. Still further, since the multi-bit sigma-delta A/D converter uses an internal 1 bit sigma-delta A/D converter to calibrate the non-linearity of the D/A converter, a decimation filter may also be needed in order to provide calibration. In addition, a high oversampling ratio of between 128 Fs and 256 Fs may be required since a fast clock is generally used to obtain sufficiently accurate error data.
The design and operation of various A/D converters are described in detail in chapter 31 of the textbook entitled "The Electrical Engineering Handbook" edited by Dorf, CRC Press, Inc. (1993); the article entitled "A High Resolution Multi-Bit .SIGMA..DELTA. ADC With Digital Correction and Relaxed Amplifier Requirements," Sarhang-Nejad and Temes, IEEE Journal of Solid-State Circuits, Volume 28, No. 6, pages 648-660 (June 1993); the article entitled "Digitally Corrected Multi-Bit .SIGMA..DELTA. Data Converters," Cataltepe, et al., IEEE Proceedings of ISCAS '89, pages 647-650 (May 1989); the article entitled "Multi Bit Oversampled .SIGMA.-.DELTA. A/D Converter With Digital Error Correction," Larson et al., Electronic Letters, Volume 24, pages 1051-52 (August 1988); and the article entitled "Architectures For High Order Multi-Bit .SIGMA..DELTA. Modulators," IEEE Proceedings of ISCAS '90, pages 895-898 (May 1990).
In addition to the sigma-delta A/D converter described above, other alternatives exist which may achieve the goal of high resolution. Examples of these other alternatives include a trimming process, a random aging process and an averaging process. However, in these alternatives, the analog or digital circuitry may become very complicated.
Unfortunately, these prior art alternatives may still produce problems of their own. For example, the increased complexity of the circuitry may cause problems with linearity, as well as increases in oversampling ratios, stabilization and noise.